A “Graphic-wave” LFO

I was exchanging a few emails with a customer recently, and they suggested designing a chip that allowed you to define an LFO shape with a set of controls – obviously sliders would be perfect for something like this, like a Graphic EQ for LFOs! The idea was that you’d have some waveform sliders, plus a rate control and tap tempo, and maybe a level control, and bingo!

Note that we could either interpolate between the points, which gives us the option to do ramps, more spiky-looking triangular waveforms, or linear-segment approximations to curved waveforms, or we could output the selected points as fixed levels, which enables us to make a selection of interesting pulse waves, staircases, and little sequences. It’s pretty versatile.

Is it possible? Choosing a chip for the job

So how hard would this be? Well, if we do it with a processor, we need quite a few ADC channels. A 14-pin chip would give us 12 input/output pins (IOs). For starters, we need an output, tap tempo input, a Rate control, and a Level control. That’s four IOs. Additionally, it might be nice to have an Offset control (like the StompLFO) and an input to select between providing the output as discrete steps or crossfaded slopes from one point to the next. That’s 6 IOs. That would leave 6 channels for defining our waveform, assuming we can find a 14-pin chip with 10 ADC inputs. Alternatively we could use an 18 or 20-pin chip, which could give us 12 or even 14 channels for defining our waveform.

Version 1 – Starting simple with 8 points

It makes sense to start simple and work up. The 16F18323 is a 14-pin chip with up to 11 ADC inputs, so it’s a good choice. We can use the pin allocation table in the datasheet to sketch out a pinout to give us an idea how this would work:

Most of this is pretty obvious. We’ve got eight inputs from the top-right coming around clockwise to define our waveform. After that we have one ADC input for the Rate CV. Pin 4 is a digital-input-only pin, so that’s a good choice for the Tap Tempo input. Pin 3 could be an ADC input, in which case we could add a Level CV, or it could be a digital input so we could add a Levels/Slopes selection. Since level control is easy to do off-chip and the Levels/Slopes control is impossible to do off-chip, I’ve decided to go with that. Finally, we’ve got pin 2 for the LFO output.

What does the code need to do?

The code should be relatively straight-forward. We need an NCO running the show, providing our underlying LFO frequency. I know from experience on other LFO projects that a three byte (24-bit) phase accummulator will give us enough accuracy. We can use the upper three bits of the phase to address the points, and the remaining bits to provide an index to crossfade between them for the “Slopes” mode. The NCO will need to be updated at the output sample rate, so this will be in an interrupt routine.

Meanwhile, the main code needs to scan the various controls (The CV inputs for the waveform points, plus the Rate CV) and update variables as appropriate. It will also need to debounce the Tap Tempo input and monitor it for changes.

In the end, I didn’t do this exactly as I proposed above. It’s more convenient to have the three bits for the Waveform point selection in their own variable, so I essentially added an extra byte above the three bytes of the NCO and used only the lowest three bits. One way to see this is that we now use a 27-bit NCO, right-aligned in four bytes. Another way to see the same thing is to say that we’re running the 24-bit NCO eight times as fast because we have to scan through eight points before we complete our LFO cycle.

Version 2 – Adding more points

Sticking with the same series of chips will make moving the code easier, so I had a look at the datasheets for the rest of the 16F183xx series. There are some 20-pin devices (the 16F18344, 345, and 346). These are the same apart from the amount of memory they have. As this LFO doesn’t store any waveforms it doesn’t need much memory, so I chose the bottom-end version, the 16F18344. This has 2K of Program Flash memory, and even this is too much. The Graphic 8 version above manages with only 1K!

The pinout finishes up being very much the same, except this time we get 14 waveform points:

It’s a pity we can’t have 16 waveform points, but there isn’t a 22-pin chip! You could do it on a 28-pin chip, but I haven’t tried that yet. Some of the 28-pin devices claim to have 24 ADC channels, so 16 points should be easy in theory.

So can I play with it? I want a go!

I haven’t done a final version of this yet, and I’ve got no immediate plans to turn it into a Druid chip. You’ll have to program one up:

• PIC 16F18323 assembly code GRAPHIC8LFO.ASM
• Compiled version of the above, ready to program GRAPHIC8LFO.HEX
• PIC 16F18344 assembly code GRAPHIC14LFO.ASM
• Compiled version of the above, ready to program GRAPHIC14LFO.HEX
• GRAPHICLFO datasheet, including schematic diagrams

The schematic diagram is very simple. It has pots for the wave points (and slider pots are really the way to go for a project like this), another pot for the Rate CV, and a button and Sync input attach to the Tap Tempo input. The output on my prototype has passive filtering, and that seems to work ok, but a more finished version could add active filtering as shown in the datasheet.

I can’t compile it! MPLAB throws a wobbly!

This code is written in MPASM. Unfortunately Microchip in their infinite wisdom have dropped support for this compiler (thus making all their datasheet examples non-functional!). I’m still using MPLAB X V4.05, which is one of the last versions that supports it.

Hey! This thing’s just a sequencer!

This chip is pretty much just a simple 8 or 14-step sequencer, yes. Many sequencers have no problem running at LFO rates or even up into audio, and a few even offer the cross-fade feature that generates slopes. That “Slopes” feature is certainly the biggest difference from most simple sequencers. Alternatively, you could filter the sequencer’s output to get this “smoothed” effect, although that requires the filter to be tuned to the sequencer’s output frequency. This LFO chip provides that “tuned integration” feature automatically.

When I realised that there was such a lot of overlap between this chip and a basic analog sequencer, I started thinking about sequencer design, and wondering if I could program a chip that would make sequencer building easy, while still offering all the features we’ve mentioned so far. Since sequencers commonly come in eight and sixteen step variants, it would be useful if we could easily make those options. This chip has eight steps so it seems ideal initially, but we’d need to somehow link two of them together to make a 16-step sequencer. That’s quite tricky, and needs more pins provided on the chip to do it. What about if we wanted to be able to link four simple chips to make a 32-step sequence? Tricky, again. Imagine what happens when we reach the last step of one chip and are about to move to the first step of the next one – how can we do a smooth slope from one value to the next when those two points are on different chips? It’s possible, but it would require intelligent communication between the two chips and it all starts to get complicated.

I think there is definitely a role for processors in modern analog sequencers, but that role is replacing the large amounts of “glue logic” that classic designs tend to have and simplifying the schematic, rather than replacing the actual analog parts of the circuit. Those are probably still best done the traditional way with decoder circuits driving pots.

If I do design a sequencer, I’ll post an article about it!

Feedback and comments

Any feedback or comments about the LFO are appreciated! Please comment below.

These designs and schematics are licensed under a Creative Commons Attribution-NonCommercial-ShareAlike 4.0 International License. Here’s the legal stuff.